Digital Logic
How a D flip-flop works
A D flip-flop stores one bit. At the rising edge of its clock, the instant the clock goes from 0 to 1, it copies its D input to its output Q. The rest of the time it ignores D completely and holds what it copied. That one rule, copy on the edge and hold, is the basis of every register, counter and processor.
Copy on the edge
Think of a camera. It takes its picture at one instant, the press of the shutter, and the picture doesn't change afterwards, whatever moves in front of the lens. The clock's rising edge is the shutter; D is the scene; Q is the photo.
| CLK | D | Q next |
|---|---|---|
| rising edge | 0 | 0 |
| rising edge | 1 | 1 |
| high, low or falling | anything | Q (hold) |
So set D to 1, raise the clock, and Q becomes 1. Set D back to 0 without a new edge, and Q still says 1. Leaving the clock high isn't an edge either, and nor is a falling one.
Live experiment
Copy on the edge, then hold
Flip D as much as you like: Q only copies it at the moment you raise the clock. Leave the clock high and flip D again, then lower the clock: nothing changes, because only a rising edge counts. A strip draws D, CLK and Q.
“Remember a bit” is lesson 6 of 6 in Gate Grove, Digital Logic World 1. Free with an account. Lessons unlock in order, so you’ll do the 5 before it first.
Latch vs flip-flop
A D latch is level-sensitive: while its enable is high, Q follows D, changes and all. A flip-flop is edge-triggered. It's usually built from two latches back to back, a leader and a follower, whose enables are opposite: while the clock is low the first latch follows D, and when the clock rises it shuts, and the second passes its frozen value to Q.
Edges make big circuits manageable. Every flip-flop in a processor takes its picture at the same instant, the gates between them have a whole clock tick to work out the next values, and then everything steps forward together.
Rows of them
One flip-flop holds a bit. Eight side by side, sharing a clock, hold a byte, a number from 0 to 255: that's a register. Chain them so each Q feeds the next D and you get a shift register. Feed Q̄ back to D and each edge copies the opposite of Q, so Q toggles, at half the clock's frequency: a chain of those is a binary counter.
In a chip like the 74HC74, two D flip-flops come in one package, each with its own clock, D, Q and Q̄, plus set and clear inputs that force Q immediately, clock or no clock.
Free lesson
Now build it yourself
Each lesson comes in three short parts: see the idea, try it on a live board, then build it yourself, with quick checks as you go.
“Remember a bit” is lesson 6 of 6 in Gate Grove, Digital Logic World 1. Free with an account. Lessons unlock in order, so you’ll do the 5 before it first.
Or start from the very first lesson, no account neededPractice questions
Three quick questions from the lessons. Pick an answer to check it.
Show the answer
Answer: Still 0: nothing changes until the clock's edge. The flip-flop only looks at D on the clock's rising edge. Until then, Q holds its old value, 0, no matter what D does.
- Why not “1 at once”? That's how a transparent latch behaves. A flip-flop waits for the clock's rising edge before it looks at D.
- Why not “Unknown”? Q isn't unknown. It still holds the 0 it had, until an edge copies something new.
- Why not “Flickering”? Q never flickers: between edges it holds steady, whatever D does.
Show the answer
Answer: 1, and stays 1 after D goes back to 0. The edge copies D into Q, and Q holds it. D can go back to 0 afterwards; Q keeps the 1 until the next edge copies something else.
- Why not “Whatever it was”? The rising edge is exactly when Q changes: it takes D's value, 1.
- Why not “1, until D goes back to 0”? Following D after the edge would make it a latch. A flip-flop keeps what it copied until the next edge.
- Why not “0”? The edge copies D, and D is 1, so Q becomes 1, not 0.
Show the answer
Answer: Holds: a clock that stays high isn't an edge. The flip-flop copies D only at the rising edge, the moment the clock goes from 0 to 1. Staying at 1 is not a new edge, so Q keeps what it copied.
- Why not “Flickers”? Q stays steady between edges; that steadiness is the whole point of a flip-flop.
- Why not “Follows D while the clock is high”? Following D while the clock is high is what a latch does. A flip-flop only acts at the moment of the rising edge.
- Why not “Goes to 0”? Nothing sends Q to 0. With no new edge, Q keeps the value it copied.
“Remember a bit” is lesson 6 of 6 in Gate Grove, Digital Logic World 1. Free with an account. Lessons unlock in order, so you’ll do the 5 before it first.
Questions people ask
What does the D in D flip-flop stand for?
Data, or sometimes delay. Whatever is on the D input at a clock edge appears on Q and stays there until the next edge, so the output is the input delayed by up to one clock tick.
What is the difference between a D latch and a D flip-flop?
A D latch is transparent: while its enable is high, Q follows D. A D flip-flop is edge-triggered: Q copies D only at the instant the clock rises and ignores D the rest of the time.
What are setup time and hold time?
A real flip-flop needs D to be steady for a short time before the clock edge (setup) and a short time after it (hold), typically nanoseconds, given in the datasheet. If D changes inside that window, Q can come out wrong or hesitate before settling.
How do you make a toggle flip-flop from a D flip-flop?
Wire Q̄, the inverted output, back to D. Each rising edge then copies the opposite of what Q holds, so Q flips on every tick, at half the clock's frequency.
Related topics
- How an SR latch remembers a bitTwo cross-coupled gates that hold a 1 or a 0, and the D latch built on them.
- How a binary counter divides a clock by 2, 4, 8 and 16Flip-flops that toggle, chained: each one halves the clock, together they count.
- How a shift register worksFlip-flops in a chain that pass bits along: serial in, parallel out.
- Logic gates explainedAND, OR, NOT, XOR and their bubbled twins: each one's rule is a truth table.