Digital Logic
How to make a binary counter stop at any number
To make a counter stop at a chosen number instead of wrapping round, do two things. Spot the number with a NAND gate watching the bits that are 1 in it; call its output GO. Then hold the first flip-flop with an XOR in front of its D input, D = Q XOR GO. While GO is 1 the flip-flop toggles and counts; when the count arrives, GO drops to 0, and in a ripple counter the whole count freezes.
Spot the number
9 is 1001: the 8s and 1s bits on. Counting up from 0, no number before 9 has both of those bits on, so a NAND of just those two bits is 1 from 0 to 8 and drops to 0 at 9:
You only need the bits that are 1 in your number, because counting up, the first number to have all of them on is the number itself. To stop at 6 (110), watch the 4s and 2s. To stop at 5 (101), the 4s and 1s. To stop at 12 (1100), the 8s and 4s.
Hold with an XOR
A toggling flip-flop normally has its own Q̄ at D. Put an XOR in front instead:
XOR with 1 flips a bit, so while GO is 1, D is Q̄ and the flip-flop toggles. XOR with 0 changes nothing, so when GO drops, D is Q and the flip-flop copies itself on every tick: it holds.
Freeze the first, freeze them all
In a ripple counter only the first stage hears the clock; each later stage is clocked by the stage before it. Hold the first and no edge ever reaches the rest. The counter climbs to its target and stays there, however long the clock keeps ticking.
Live experiment
Count six eggs, then stop
Four flip-flops count eggs rolling past, one a tick. GO is a NAND of the bits you tap, and the first flip-flop's D is its Q XOR GO. The count climbs to the first number with every watched bit on, then holds while the clock keeps ticking. Make it stop at 6, an egg box.
“Stop at the top” is lesson 3 of 6 in Toggle Tides, Digital Logic World 3. Free with an account. Lessons unlock in order, so you’ll do the 16 before it first.
Hold or wrap?
| Counter | At the target | Used for |
|---|---|---|
| Free-running | Wraps to 0 | Dividers, clocks |
| Mod-N | Resets to 0 and carries on | Divide-by-N, a 0 to 9 digit |
| Stopping | Holds until reset | Batch counts, volume limits |
A stopping counter needs a way back to 0, such as a clear input on its flip-flops, before it can count the next batch.
Enable on D, not on the clock
You could stop the count by ANDing the clock with GO instead. On a small board it may work, but every gate in a clock's path delays it, and changing the enable mid-tick can make a short false edge. Real designs leave the clock alone and put the enable on D, exactly as the XOR does here. Synchronous counter chips like the 74HC161 have enable pins that work this way.
Packing machines count to a box's worth and stop; a digital volume control stops at its top setting instead of wrapping round to silence.
Free lesson
Now build it yourself
Each lesson comes in three short parts: see the idea, try it on a live board, then build it yourself, with quick checks as you go.
“Stop at the top” is lesson 3 of 6 in Toggle Tides, Digital Logic World 3. Free with an account. Lessons unlock in order, so you’ll do the 16 before it first.
Or start from the very first lesson, no account neededPractice questions
Three quick questions from the lessons. Pick an answer to check it.
Show the answer
Answer: The 8s and 4s bits. 12 has the 8s and 4s bits on, and no number below 12 has both. Watching the 8s alone would stop at 8.
- Why not “The 8s bit only”? The 8s bit first turns on at 8, so the counter would stop there, four short of 12.
- Why not “The 2s and 1s bits”? Those bits are 0 in 1100. The NAND watches the bits that are 1 in the target.
- Why not “All four bits”? A NAND of all four would wait for 1111, which is 15. Only the target's 1 bits matter.
Show the answer
Answer: The later stages only tick when the one before them changes. In a ripple counter each stage is clocked by the one before it. Freeze the first and no clock edge ever reaches the rest.
- Why not “GO reaches them through Q̄”? GO only feeds the first stage's XOR. The rest stop because no clock edge reaches them.
- Why not “The others have no clock”? They do have clocks: each is clocked by the stage before. That's exactly why freezing the first freezes them all.
- Why not “The others are faster”? Speed isn't the reason. In a ripple chain, a stage can only change after the one before it does.
Show the answer
Answer: Keeps its state. Q XOR 0 is Q: the flip-flop copies itself. It only flips on the one tick PULSE is 1.
- Why not “Turns off”? Nothing forces the lamp off. Q XOR 0 is Q, so it copies whatever it holds.
- Why not “Flips”? Flipping needs PULSE at 1, since Q XOR 1 is Q̄. With PULSE at 0, D is Q.
- Why not “Turns on”? Nothing forces it on either. With PULSE at 0 the flip-flop simply reloads its own state.
“Stop at the top” is lesson 3 of 6 in Toggle Tides, Digital Logic World 3. Free with an account. Lessons unlock in order, so you’ll do the 16 before it first.
Questions people ask
How do I make a counter stop instead of wrapping round?
Detect the stopping number with a gate, and use that gate's output to disable counting. In a ripple counter, holding the first flip-flop is enough: put an XOR in front of its D, fed by its own Q and the enable signal, so it toggles while enabled and holds when not.
What's the difference between this and a mod-N counter?
A mod-N counter resets to 0 when it reaches N and keeps going, so it repeats every N ticks: a divide-by-N. A stopping, or saturating, counter holds at its target until something resets it.
Why not just stop the clock with an AND gate?
Gating a clock delays it and can create short false edges as the enable changes. In a big chip those delays make flip-flops disagree about when a tick happened. Leaving the clock alone and putting the enable on D is the standard, safe design.
Related topics
- How a binary counter divides a clock by 2, 4, 8 and 16Flip-flops that toggle, chained: each one halves the clock, together they count.
- Logic gates explainedAND, OR, NOT, XOR and their bubbled twins: each one's rule is a truth table.
- How a D flip-flop worksCopy D to Q at the clock's rising edge, then hold it: one bit of memory.
- Why is NAND called a universal gate?NOT, AND, OR and XOR from one kind of gate, and why chips love it.